1. Field of the Invention
The present invention relates to a semiconductor chip which is applicable to a chip-on-chip structure in which semiconductor chips are joined to each other by overlapping one of the semiconductor chips with a surface of the other semiconductor chip, and also applicable to a flip-chip-bonding structure in which a semiconductor chip and a printed wiring board are joined to each other by opposing a surface of the semiconductor chip to the printed wiring board.
2. Description of Related Art
An example of a structure for miniaturizing and increasing the integration density of a semiconductor device is a so-called chip-on-chip structure in which paired semiconductor chips are overlapped with and joined to each other such that their surfaces are opposite to each other.
A pad opening, for example, for partially exposing internal wiring is formed on the surface of the semiconductor chip which is applied to the chip-on-chip structure. A bump is provided on the internal wiring exposed through the pad opening. The respective bumps in the semiconductor chips which are opposite to each other are joined to each other, to achieve electrical connection between the semiconductor chips.
When the semiconductor chips are joined to each other, the bumps in the opposite semiconductor chips are made to adhere to each other by heat applied to respective joints of the bumps while being pressed against to each other, for example. When a functional device such as a transistor is arranged below the bump, a force or heat applied to the bump is propagated to the functional device through the internal wiring, which may degrade the characteristics of the functional device.
In the semiconductor chip which is applied to the chip-on-chip structure, therefore, a region where the bump is to be formed (a region to which another semiconductor chip is to be joined) must be provided in a place other than a region where the functional device is to be formed. This prevents the chip size to be reduced.
An object of the present invention is to provide a semiconductor chip capable of reducing the chip size.
A semiconductor chip according to the present invention is a semiconductor chip which is joined to a surface of a solid, which comprises a surface protective film formed on its surface opposite to the surface of the solid; a connecting member formed on the surface protective film for supporting the semiconductor chip on the surface of the solid and electrically connecting the semiconductor chip and the solid to each other; and surface wiring for connecting internal wiring formed under the surface protective film and the connecting member to each other.
For example, when a pad opening for exposing a part of the internal wiring is formed in the surface protective film that covers the internal wiring, the surface wiring may connect the internal wiring and the connecting member to each other through the pad opening.
The surface of the solid may be a surface of another semiconductor chip or a surface of a wiring board.
The connecting member may be a metal bump provided in a raised state on the surface protective film, or a metal evaporated film which is not so high as the metal bump.
According to the present invention, the connecting member for electrical connection to the semiconductor chip, the wiring board, or the like (the solid) is formed on the surface protective film, and is connected to the internal wiring through the surface wiring. Consequently, a force or heat applied to the connecting member at the time of joining the semiconductor chip and the solid to each other, is absorbed by the surface protective film. Even if a functional device is arranged below the connecting member, therefore, the characteristics of the functional device are not degraded. Accordingly, the functional device can be arranged below the connecting member, thereby making it possible to reduce the chip size.
Furthermore, the internal wiring and the pad opening can be formed in positions independent of the connecting member, thereby making it possible to design an internal circuit in the solid to be joined without considering the layout of the internal circuit. Consequently, it is possible to further miniaturize the semiconductor chip.
The connecting member can be arranged in an arbitrary position on the surface protective film. When the semiconductor chip is applied as a primary chip in a semiconductor device having a chip-on-chip structure, for example, therefore, the degree of freedom of an arrangement of another semiconductor chip (a secondary chip) on the primary chip is increased. When a plurality secondary chips are joined to the primary chip, therefore, the plurality of secondary chips can be efficiently arranged on the primary chip, thereby making it possible to prevent the chip size of the primary chip from being increased.
The connecting member may be formed by stacking a seed film on a surface of the surface protective film having the pad opening formed therein and selectively plating the seed film. In this case, it is preferable that the surface wiring is formed by patterning the seed film. In this case, a material for the surface wiring need not be prepared, thereby making it possible to prevent the cost of the semiconductor chip from being increased.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.